Article View: alt.folklore.computers
Article #621094Re: BYTE Magazine Pentomino Article
From: Mike Spencer
Date: Thu, 08 Mar 2018 03:27
Date: Thu, 08 Mar 2018 03:27
46 lines
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4110 bytes
Quadibloc <jsa...@ecn.ab.ca> writes: > On Tuesday, March 6, 2018 at 4:24:58 PM UTC-7, Mike Spencer wrote: > >> Could you put into moderately simple words how it is/was that the >> Pentium 4 was a "detour"? Thank you. I understood nore than half of that. Might get even more on re-reading. (Remainder left in for the record.) > The Pentium 4 had a reduced number of gate delays per cycle. This > meant that it could achieve a higher frequency as measured in MHz, > but instructions took more cycles. > > That didn't make the higher frequency a mere marketing gimmick, as > some comments at the time claimed. Since the Pentium 4, like its > predecessors, was pipelined, it started a new instruction on every > clock cycle, so it did do more work, in proportion to its faster > frequency. > > However, the higher frequency meant that more of the transistors on > the chip were doing work - and therefore switching - at any one > time. So the chip used significantly more power than chips based on > the older design. That was all right for the Pentium 4 _itself_ - it > didn't have heat or reliability problems. > > But the Pentium 4 had the bad luck to come along just when Dennart > scaling died out. So when Intel shrank the feature size on its > chips, the transistors didn't get faster and use less power to the > same extent as they had before with every process shrink. > > So Intel had to go back to its earlier design to get something that > would not overheat a chip packed with more of the new, smaller, > transistors - since they weren't cooler transistors too. To get more > performance, they started putting more cores on the chips instead > (although they did manage a dual-core based on the Pentium 4 design, > the Pentium D). > > John Savard -- Mike Spencer Nova Scotia, Canada
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