🚀 go-pugleaf

Bob Eager <news...@eager.cx> writes:
> FSVO full - 24 bits? (until XA)

modulo 360/67 and (virtual) 32bit mode
http://bitsavers.org/pdf/ibm/360/funcChar/GA27-2719-2_360-67_funcChar.pdf

... over decade later XA with 3081 was only 31bit. a little 3081 XA
http://www.jfsowa.com/computer/memo125.htm

3033 did have gimmick with 26bit mode ... instruction addressing was
only 24bit addressing ... but could have 64mbytes real storage. page
tables entries were half-words, 16bits, 12bit virtual 4kbyte page number
...  (12bit number + 12bit displacement, 24bits), reference bit, change
bit, and two undefined bits. 3033 took two undefined bits and prefixed
them to 12bit page number for 14bit (real) page number. Large number of
24bit virtual address spaces ...  mapped to 26bit real address.

past post mentioning 3033 26bit real address hack:
http://www.garlic.com/~lynn/2001b.html#69 Z/90, S/390, 370/ESA (slightly off topic)
http://www.garlic.com/~lynn/2001i.html#13 GETMAIN R/RU (was: An IEABRC Adventure)
http://www.garlic.com/~lynn/2002c.html#40 using >=4GB of memory on a 32-bit processor
http://www.garlic.com/~lynn/2003d.html#26 Antiquity of Byte-Word addressing?
http://www.garlic.com/~lynn/2004.html#0 comp.arch classic: the 10-bit byte
http://www.garlic.com/~lynn/2004.html#17 Holee shit!  30 years ago!
http://www.garlic.com/~lynn/2004c.html#6 If the x86 ISA could be redone
http://www.garlic.com/~lynn/2004n.html#50 Integer types for 128-bit addressing
http://www.garlic.com/~lynn/2004o.html#57 Integer types for 128-bit addressing
http://www.garlic.com/~lynn/2005.html#34 increasing addressable memory via paged memory?
http://www.garlic.com/~lynn/2005p.html#1 Intel engineer discusses their dual-core design
http://www.garlic.com/~lynn/2005p.html#19 address space
http://www.garlic.com/~lynn/2006p.html#0 DASD Response Time (on antique 3390?)
http://www.garlic.com/~lynn/2007o.html#10 IBM 8000 series
http://www.garlic.com/~lynn/2007o.html#56 360/30 memory
http://www.garlic.com/~lynn/2008f.html#12 Fantasy-Land_Hierarchal_NUMA_Memory-Model_on_Vertical
http://www.garlic.com/~lynn/2010.html#84 locate mode, was Happy DEC-10 Day
http://www.garlic.com/~lynn/2010l.html#6 Z/OS 31bit or 64bit
http://www.garlic.com/~lynn/2011f.html#50 Dyadic vs AP: Was "CPU utilization/forecasting"
http://www.garlic.com/~lynn/2011k.html#87 'smttter IBMdroids
http://www.garlic.com/~lynn/2012e.html#80 Word Length
http://www.garlic.com/~lynn/2012h.html#57 How will mainframers retiring be different from Y2K?
http://www.garlic.com/~lynn/2013c.html#48 What Makes an Architecture Bizarre?
http://www.garlic.com/~lynn/2013n.html#83 'Free Unix!': The world-changing proclamationmade30yearsagotoday
http://www.garlic.com/~lynn/2014g.html#83 Costs of core
http://www.garlic.com/~lynn/2014i.html#16 R.I.P. PDP-10?
http://www.garlic.com/~lynn/2014k.html#36 1950: Northrop's Digital Differential Analyzer
http://www.garlic.com/~lynn/2015b.html#46 Connecting memory to 370/145 with only 36 bits
http://www.garlic.com/~lynn/2016b.html#35 Qbasic
http://www.garlic.com/~lynn/2017i.html#48 64 bit addressing into the future

-- 
virtualization experience starting Jan1968, online at home since Mar1970