🚀 go-pugleaf

In article <1989Dec14.0...@cs.rochester.edu>, fu...@cs.rochester.edu (Mark Fulk) writes:
> 
> If you haven't heard this one, you're probably wondering what it's about.
> On 6600's you loaded and stored X registers by loading A registers with
> the addresses; if you loaded A0, X0 got stored; if you loaded A1 to A4,
> the corresponding X got loaded.  To store an A register, you moved it to
> a free X register; to load it, you got the address into an X register.
> So X0 (I may have which registers did what a bit wrong; it's been ten years)
> mostly had to be kept empty.
>
   Some details deleted.
> 
> This is my memory of what I was told by various friends.  Anyone with more
> direct knowledge, please correct me where I'm wrong.
> 
> Mark

The above is sort of right, but here are the gory details, (taken from 20
years of CDC assembler experience, plus the old listing still stored next
to my desk!)

OK, there are 3 register sets:

B (18 bit index registers) 1 through 7.  B0 is write-only, it always
reads as 0. 

X (60 bit data registers)

A (18 bit address registers)  Writing into A1 - A5 reads the contents of that
memory address into the corresponding X register.  Writing into A6 or 7 causes
the contents of X6 or 7 into memory.  Modifying A0 does not perform any memory
access.

Now, note that the only way to store anything into memory is writing into (and
thus destroying the contents of) A6 or A7.  But.. an Return Jump instruction
(used for calling subroutines) will write a return branch instruction into
memory.  We now have the basis for setting memory flags depending on B 
register bits.

OK, so the sequence for freeing up 1 B register is:
	 PL   B7,BRANCH1                    (jump to BRANCH1 if B7 is positive)
	 RJ   BRANCH1A                      (stores return in BRANCH1A and
                                             starts executing at BRANCH1)
BRANCH1A DATA 0
BRANCH1  SB7 B7+B7                          (sets B7 = B7*2, shifting the next
                                             bit to the sign position)
         PL   B7,BRANCH2
	   .
	   .   continue for all 18 bits.
           .


B7 is now free to save A7, so X7 can be saved without loss, etc.  BRANCH1A, etc.
contain indications of the previous values of the 18 bits of B7.

Whew!  Register restore was handled by instruction modification.  (Hey,
it worked.  What can I say?) I might add that this register saving was
done very seldom; I have seen it used only in debugging packages.
Subroutines simply documented which registers were destroyed, and the
system monitor didn't have to worry about such trivia, since the
user's registers were already saved by hardware.
-------------------------------------------------------------------------
Steve Roseman
Lehigh University Computing Center
LU...@VAX1.CC.Lehigh.EDU