🚀 go-pugleaf

>There seems to be a general misunderstanding extant that the memory chips
>somehow tell the processor what speed they are, and can slow down the CPU.
>** THIS IS NOT TRUE **
>
>The CPU puts the address up, then some time later that only depends on the
>CPU's internal timing it samples the data lines.  IF THE MEMORY WAS TOO SLOW
>AND DIDN'T GET THE DATA UP IN TIME, TOUGH NOOGIES, *NOBODY NOTICES*!!!

some memory systems (I can't speak for specific memory CHIPS) have programmable
wait states that hold off the processor (or any other bus master) after they
get a read or write request.  this is to allow mixed-speed memory in the
same system, i.e. a memory card could have a gaurenteed access time of
100nS and another cheapie that you bought mail-order could have 200nS, and
if the bus, processor and memory cards support the notion of wait states,
accesses to the two cards will provide the correct results, although the
latter card will take longer to provide the data.  this happens most often
in 386 systems that use a mix of 32-bit and 16-bit memory cards; usually the
16-bit cards have a multiple wait-state generator that is used to allow the
card's operation on a (faster) bus (and to take into account the differences
between 16-bit and 32-bit accesses).

mike bender
sun